This invention relates, in general, to a method for adjusting characteristic impedances, and more particularly, to a method for adjusting a characteristic impedance for a semiconductor package.
Advances in semiconductor wafer processing and packaging techniques have paved the way for the manufacture of high speed electronic systems including high speed computer systems, automatic test equipment, instrumentation, and communications systems. The packaged semiconductor devices used as components in these systems send and receive electrical signals at such high speeds that the interconnects through which the electrical signals travel must be treated as transmission lines having a characteristic impedance Z.sub.0. An important parameter governing the characteristic impedance is the distance between a ground plane and the interconnect or signal line. For example, the characteristic impedance of a microstrip transmission line is approximated by the equation: ##EQU1##
The parameters "w" and "t" refer to the width and the thickness, respectively, of a conductive finger and the parameters "h" and "e.sub.r " refer to the thickness, and the relative dielectric constant, respectively, of a dielectric layer between a ground plane and the conductive finger. This formula applies when the ratio of "w" to "h" ranges between approximately 0.1 and approximately 3 and when the dielectric constant, e.sub.r. ranges between approximately 1 and approximately 15.
TAB (Tape Automated Bonded) packages include a region, commonly referred to as a fan-out region, in which the impedance of a plurality of conductors must be controlled to ensure the proper operation of a semiconductor die housed by the TAB package. This impedance control is accomplished using a two-metal TAB tape in which the plurality of conductors are fabricated from a first metal layer and a ground plane for the plurality of conductors is fabricated from the second metal layer. A dielectric film is sandwiched between the two metal layers and provides the desired separation between the plurality of conductors and the ground plane, and thereby forms a microstrip transmission line having a characteristic impedance Z.sub.0.
The two-metal TAB tape configuration is useful to the semiconductor manufacturer for testing the packaged semiconductor die and to "end-users" whose system design constraints permit using a packaged semiconductor die having an attached ground plane. However, for system designs in which the fan-out region is undesirable due to, for example, space constraints, the plurality of conductors must be severed near the semiconductor die such that the fan-out region and its attached ground plane are removed from the TAB package. In these types of applications, the ground plane is still used by semiconductor manufacturers for maintaining the characteristic impedance of the plurality of conductors while testing the packaged semiconductor die. Although including the ground plane by using a two-metal TAB tape is necessary for testing the TAB packaged semiconductor die, it increases the manufacturing costs associated with these components. Moreover, "end-users" who do not require the fan-out region are unwilling to pay for the extra costs incurred by using the additional metal layer.
Accordingly, it would be advantageous to have a method for electrically testing a packaged semiconductor die wherein a characteristic impedance of the plurality of conductors in the fan-out region is both controllable and adjustable. Moreover, the method should provide the desired features without increasing the time required to manufacture and test the packaged semiconductor die.